Group iii nitride semiconductor substrate and manufacturing method thereof

ABSTRACT

A method of manufacturing a group III nitride semiconductor substrate includes the growth step of epitaxially growing a first group III nitride semiconductor layer on an underlying substrate, and the process step of forming a first group III nitride semiconductor substrate by cutting and/or surface-polishing the first group III nitride semiconductor layer. In the growth step, at least one element selected from the group consisting of C, Mg, Fe, Be, Zn, V, and Sb is added as an impurity element by at least 1×10 17  cm −3  to the first group III nitride semiconductor layer. A group III nitride semiconductor substrate having controlled resistivity and low dislocation density and a manufacturing method thereof can thus be provided.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a group III nitride semiconductorsubstrate having controlled resistivity and low dislocation density anda manufacturing method thereof.

2. Description of the Background Art

In recent years, development of a group III nitride semiconductorsubstrate suitable as a substrate of various semiconductor devices suchas an optical device and an electronic device, that has controlledresistivity, low dislocation density, and stable electric characteristicand/or optical characteristic, has been demanded.

As a method of significantly lowering dislocation density of a group IIInitride semiconductor substrate, for example, Japanese PatentLaying-Open No. 2001-102307 (hereinafter, referred to as PatentDocument 1) proposes a method of lowering dislocation density in aregion other than a dislocation-concentrated region (referred to as lowdislocation region here and hereinafter), by concentrating dislocationswithin crystals in the dislocation-concentrated region in the centerportion of a pit by forming and maintaining facets inclosing the pitwhile crystals of a group III nitride semiconductor are grown on anunderlying substrate.

In a GaN substrate obtained with the method according to Patent Document1, however, the dislocation-concentrated region and the low dislocationregion have been present in a mixed manner. In addition, in the lowdislocation region as well, a region resulted from growth using the GaNfacet as a growth surface (facet growth region) has become a regionhaving low resistivity (low resistivity region), while a region resultedfrom growth using a GaN C face as a growth surface (C face growthregion) has become a region having high resistivity (high resistivityregion), and therefore, the low resistivity region and the highresistivity region have been present in a mixed manner. Therefore,in-plane distribution of dislocation density and resistivity of the GaNsubstrate obtained with the method according to Patent Document 1 hasbeen great.

In addition, Japanese Patent Laying-Open No. 2000-068498 (hereinafter,referred to as Patent Document 2) proposes forming a group III nitridesemiconductor layer having high resistivity by adding C (carbon) in highconcentration during growth of crystals of a group III nitridesemiconductor, while Japanese Patent Laying-Open No. 10-112438(hereinafter, referred to as Patent Document 3) proposes growth of ap-type group III nitride semiconductor with fewer crystal defects.Moreover, Japanese Patent Laying-Open No. 11-026383 (hereinafter,referred to as Patent Document 4) proposes forming a buffer layer on asubstrate, to which C has been added in advance in high concentration,in order to grow a group III nitride semiconductor with fewer crystaldefects.

In any of Patent Documents 2 to 4 above, however, control of theresistivity has been difficult, and in-plane distribution of theresistivity has been great. In addition, in the group III nitridesemiconductor layer or the group III nitride semiconductor layersubstrate in any of Patent Documents 2 to 4 above, the dislocationdensity thereof cannot be as low as that of the GaN substrate obtainedwith the method according to Patent Document 1 above, and stability ofthe electric characteristic and/or optical characteristic has beeninsufficient.

SUMMARY OF THE INVENTION

An object of the present invention is to provide a group III nitridesemiconductor substrate having controlled resistivity and lowdislocation density and a manufacturing method thereof.

The present invention is directed to a group III nitride semiconductorsubstrate containing at least one element selected from the groupconsisting of C, Mg, Fe, Be, Zn, V, and Sb as an impurity element inconcentration of at least 1×10¹⁷ cm⁻³. In the group III nitridesemiconductor substrate, in-plane distribution of the concentration ofthe impurity element represented as a ratio of a maximum concentrationto a minimum concentration of the impurity element in a main surface ofthe substrate is in a range from at least 1 to at most 3. The group IIInitride semiconductor substrate has resistivity of at least 1×10⁴ Ω·cmand thickness of at least 70 μm.

In addition, the present invention is directed to a group III nitridesemiconductor substrate containing at least one element selected fromthe group consisting of O, Si, S, Ge, Se, and Te as an impurity elementin concentration of at least 1×10¹⁷ cm⁻³. In the group III nitridesemiconductor substrate, in-plane distribution of the concentration ofthe impurity element represented as a ratio of a maximum concentrationto a minimum concentration of the impurity element in a main surface ofthe substrate is in a range from at least 1 to at most 3. The group IIInitride semiconductor substrate has resistivity of at most 1 Ω·cm andthickness of at least 70 μm.

In the group III nitride semiconductor substrate according to thepresent invention, average dislocation density thereof may be not higherthan 1×10⁷ cm⁻², and surface density of a dislocation-concentratedregion where dislocation density exceeds 1×10⁸ cm⁻² may be not higherthan 1 cm⁻²; GaN may be employed as the group III nitride; the mainsurface thereof may be set at an angle in a range from at least −5° toat most 5° with respect to any one of a (0001) surface, a (1-100)surface and a (11-20) surface; a half-width of a rocking curve in X-raydiffraction may be in a range from at least 10 arcsec to at most 500arcsec; carrier density may be not higher than 1×10^(15 l cm) ⁻³, or ina range from at least 1×10¹⁷ cm⁻³ to at most 1×10²⁰ cm⁻³; and absorptioncoefficient for light of a wavelength of 450 nm may be not smaller than50 cm⁻¹ or not larger than 10 cm⁻¹.

The present invention is directed to a method of manufacturing a groupIII nitride semiconductor substrate including: the growth step ofepitaxially growing a first group III nitride semiconductor layer on anunderlying substrate; and the process step of forming a first group IIInitride semiconductor substrate by cutting and/or surface-polishing thefirst group III nitride semiconductor layer. In the growth step, atleast one element selected from the group consisting of C, Mg, Fe, Be,Zn, V, and Sb is added as an impurity element by at least 1×10¹⁷ cm⁻³ tothe first group III nitride semiconductor layer.

The present invention is directed to a method of manufacturing a groupIII nitride semiconductor substrate including: the growth step ofepitaxially growing a second group III nitride semiconductor layer onthe first group III nitride semiconductor layer described above; and theprocess step of forming a second group III nitride semiconductorsubstrate by cutting and/or surface-polishing the second group IIInitride semiconductor layer. In the growth step, at least one elementselected from the group consisting of O, Si, S, Ge, Se, and Te is addedas an impurity element by at least 1×10¹⁷ cm⁻³ to the second group IIInitride semiconductor layer.

The method of manufacturing a group III nitride semiconductor substrateaccording to the present invention includes: the growth step ofepitaxially growing a third group III nitride semiconductor layer on thefirst or second, group III nitride semiconductor substrate describedabove; and the process step of forming a third group III nitridesemiconductor substrate by cutting and/or surface-polishing the thirdgroup III nitride semiconductor layer. In the growth step, at least oneelement selected from the group consisting of C, Mg, Fe, Be, Zn, V, andSb may be added as an impurity element by at least 1×10¹⁷ cm⁻³ to thethird group III nitride semiconductor layer.

In addition, the method of manufacturing a group III nitridesemiconductor substrate according to the present invention includes: thegrowth step of epitaxially growing a fourth group III nitridesemiconductor layer on the first or second group III nitridesemiconductor substrate described above; and the process step of forminga fourth group III nitride semiconductor substrate by cutting and/orsurface-polishing the fourth group III nitride semiconductor layer. Inthe growth step, at least one element selected from the group consistingof O, Si, S, Ge, Se, and Te may be added as an impurity element by atleast 1×10¹⁷ cm⁻³ to the fourth group III nitride semiconductor layer.

Moreover, in the method of manufacturing a group III nitridesemiconductor substrate according to the present invention, any one of aGaAs substrate, a sapphire substrate, an Si substrate, and an SiCsubstrate, or a group III nitride substrate obtained in a facet growthmethod may be employed as the underlying substrate. In addition, in themethod of manufacturing a group III nitride semiconductor substrateaccording to the present invention, the growth step may be performedafter a mask layer having openings is formed on at least a part of theunderlying substrate.

As described above, according to the present invention, a group IIInitride semiconductor substrate having controlled resistivity and lowdislocation density and a manufacturing method thereof can be provided.

The foregoing and other objects, features, aspects and advantages of thepresent invention will become more apparent from the following detaileddescription of the present invention when taken in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross-sectional view showing a method ofmanufacturing a group III nitride semiconductor substrate according tothe present invention, and (a) shows the step of growing a group IIInitride semiconductor layer and (b) shows the step of processing thegroup III nitride semiconductor layer.

FIG. 2 is a schematic cross-sectional view showing another method ofmanufacturing a group III nitride semiconductor substrate according tothe present invention, and (a) shows the step of growing a group IIInitride semiconductor layer and (b) shows the step of processing thegroup III nitride semiconductor layer.

FIGS. 3 to 5 are schematic cross-sectional views showing yet othermethods of manufacturing a group III nitride semiconductor substrateaccording to the present invention, and (a) shows the step of growing agroup III nitride semiconductor layer and (b) shows the step ofprocessing the group III nitride semiconductor layer.

FIG. 6 is a schematic cross-sectional view showing a method ofmanufacturing a group III nitride semiconductor substrate using a facetgrowth method, and (a) shows the step of forming a mask layer, (b) showsthe step of growing a group III nitride semiconductor layer, and (c)shows the step of processing the group III nitride semiconductor layer.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1

A group III nitride semiconductor substrate according to the presentinvention contains at least one impurity element selected from the groupconsisting of C, Mg, Fe, Be, Zn, V, and Sb as an impurity element inconcentration not lower than 1×10¹⁷ cm⁻³. In the group III nitridesemiconductor substrate, in-plane distribution of the concentration ofthe impurity element represented as a ratio of the maximum concentrationto the minimum concentration of the impurity element in the main surfaceof the substrate is in a range from at least 1 to at most 3. The groupIII nitride semiconductor substrate has resistivity of at least 1×10⁴Ω·cm and thickness of at least 70 μm.

The group III nitride semiconductor substrate contains at least oneelement from among C, Mg, Fe, Be, Zn, V, and Sb as an impurity elementby at least 1×10¹⁷ cm⁻³, so that in-plane distribution of theconcentration of the impurity element (ratio of the maximumconcentration to the minimum concentration) in the main surface of thesubstrate is reduced to a value in a range from at least 1 to at most 3,and a deep acceptor level because of these elements is formed.Therefore, resistivity of the substrate can be controlled to high, thatis, at least 1×10⁴ Ω·cm.

Preferably, in the group III nitride semiconductor substrate in thepresent embodiment, average dislocation density is at most 1×10⁷ cm⁻²,and surface density of a dislocation-concentrated region wheredislocation density exceeds 1×10⁸ cm⁻² is at most 1 cm⁻². Uniformin-plane distribution of the dislocation density is achieved, so thatthe electric characteristic and/or optical characteristic stable as thesubstrate of a semiconductor device can be obtained. The presentinventors found that at least one element from among C, Mg, Fe, Be, Zn,V, and Sb added to the group III nitride semiconductor substrate in thepresent embodiment effectively has a characteristic to suppressgeneration of dislocation and to mitigate concentration of dislocationduring crystal growth, and the present inventors could obtain a groupIII nitride semiconductor substrate attaining average dislocationdensity of at most 1×10⁷ cm⁻² and surface density of thedislocation-concentrated region where dislocation density exceeds 1×10⁸cm⁻² of at most 1 cm⁻², by adding at least one element from among C, Mg,Fe, Be, Zn, V, and Sb by at least 1×10¹⁷ cm⁻³ in growing the group IIInitride semiconductor.

Preferably, the group III nitride semiconductor substrate in the presentembodiment is implemented by a GaN substrate. The GaN substrate havingthe resistivity controlled to at least 1×10⁴ Ω·cm and a thickness notsmaller than 70 μm can widely be used as the substrate of thesemiconductor device.

The group III nitride semiconductor substrate in the present embodimentpreferably has the main surface at an angle in a range from at least −5°to at most 5° with respect to any one of a (0001) surface, a (1-100)surface and a (11-20) surface. On the group III nitride semiconductorsubstrate having such a main surface, the group III nitridesemiconductor layer having excellent crystallinity can be formed, andthe semiconductor device having stable electric characteristic and/oroptical characteristic can be obtained.

Preferably, the group III nitride semiconductor substrate in the presentembodiment has a half-width of a rocking curve in X-ray diffraction in arange from at least 10 arcsec to at most 500 arcsec. On such a group IIInitride semiconductor substrate attaining excellent crystallinity, thegroup III nitride semiconductor layer having excellent crystallinity canbe formed, and the semiconductor device having stable electriccharacteristic and/or optical characteristic can be obtained. In thepresent embodiment, by adding at least one element from among C, Mg, Fe,Be, Zn, V, and Sb by at least 1×10¹⁷ cm⁻³ to the group III nitridesemiconductor substrate, the group III nitride semiconductor substrateattaining a half-width of a rocking curve in X-ray diffraction in arange from at least 10 arcsec to at most 500 arcsec and excellentcrystallinity can be obtained.

Preferably, the group III nitride semiconductor substrate in the presentembodiment attains the carrier density not higher than 1×10¹⁵ cm⁻³. Inthe present embodiment, by adding at least one element from among C, Mg,Fe, Be, Zn, V, and Sb by at least 1×10¹⁷ cm⁻³ to the group III nitridesemiconductor substrate, the group III nitride semiconductor substrateattaining the carrier density not higher than 1×10¹⁵ cm⁻³ can beobtained, and the resistivity thereof can readily be controlled to atleast 1×10⁴ Ω·cm.

Preferably, in the group III nitride semiconductor substrate in thepresent embodiment, the absorption coefficient for light of a wavelengthof 450 nm is at least 50 cm⁻¹. In the present embodiment, by adding atleast one element from among C, Mg, Fe, Be, Zn, V, and Sb by at least1×10¹⁷ cm⁻³ to the group III nitride semiconductor substrate, the groupIII nitride semiconductor substrate attaining the resistivity controlledto at least 1×10⁴ Ω·cm and the absorption coefficient for light of awavelength of 450 nm of at least 50 cm⁻¹ can be obtained.

Embodiment 2

Another group III nitride semiconductor substrate according to thepresent invention contains at least one element selected from the groupconsisting of O, Si, S, Ge, Se, and Te as an impurity element inconcentration not lower than 1×10¹⁷ cm⁻³. In the group III nitridesemiconductor substrate, in-plane distribution of the concentration ofthe impurity element represented as a ratio of the maximum concentrationto the minimum concentration of the impurity element in the main surfaceof the substrate is in a range from at least 1 to at most 3. The groupIII nitride semiconductor substrate has resistivity of at most 1 Ω·cmand thickness of at least 70 μm.

The group III nitride semiconductor substrate contains at least oneelement from among O, Si, S, Ge, Se, and Te as an impurity element by atleast 1×10¹⁷ cm⁻³, so that in-plane distribution of the concentration ofthe impurity element (ratio of the maximum concentration to the minimumconcentration) in the main surface of the substrate is reduced to avalue in a range from at least 1 to at most 3, and a shallow donor levelbecause of these elements is formed. Therefore, resistivity of thesubstrate can be controlled to low, that is, at most 1 Ω·cm.

Preferably, as in the case of the group III nitride semiconductorsubstrate in Embodiment 1, in the group III nitride semiconductorsubstrate in the present embodiment, average dislocation density is atmost 1×10⁷ cm⁻² and surface density of a dislocation-concentrated regionwhere dislocation density exceeds 1×10⁸ cm⁻² is at most 1 cm⁻²; the GaNsubstrate is employed; the main surface thereof is at an angle in arange from at least −5° to at most 5° with respect to any one of a(0001) surface, a (1-100) surface and a (11-20) surface; and ahalf-width of a rocking curve in X-ray diffraction is in a range from atleast 10 arcsec to at most 500 arcsec.

Preferably, the group III nitride semiconductor substrate in the presentembodiment attains the carrier density in a range from at least 1×10¹⁷cm⁻³ to at most 1×10²⁰ cm⁻³. In the present embodiment, by adding atleast one element from among O, Si, S, Ge, Se, and Te by at least 1×10¹⁷cm⁻³ to the group III nitride semiconductor substrate, the group IIInitride semiconductor substrate attaining the carrier density in a rangefrom at least 1×10¹⁷ cm⁻³ to at most 1×10²⁰ cm⁻³ can be obtained, andthe resistivity thereof can readily be controlled to at most 1 Ω·cm.

Preferably, the group III nitride semiconductor substrate in the presentembodiment attains the absorption coefficient for light of a wavelengthof 450 nm of at most 10 cm⁻¹. In the present embodiment, by adding atleast one element from among O, Si, S, Ge, Se, and Te by at least 1×10¹⁷cm⁻³ to the group III nitride semiconductor substrate, the group IIInitride semiconductor substrate attaining the resistivity controlled toat most 1 Ω·cm and the absorption coefficient for light of a wavelengthof 450 nm of at most 10 cm⁻¹ can be obtained.

Embodiment 3

Referring to FIG. 1, a method of manufacturing a group III nitridesemiconductor substrate according to the present invention includes: thegrowth step of epitaxially growing a first group III nitridesemiconductor layer 11 on an underlying substrate 1 as shown in FIG. 1(a); and the process step of forming first group III nitridesemiconductor substrates 11 a, 11 b, 11 c, and 11 d by cutting and/orsurface-polishing first group III nitride semiconductor layer 11 asshown in FIG. 1( b). In the growth step, at least one element from amongC, Mg, Fe, Be, Zn, V, and Sb is added as an impurity element by at least1×10¹⁷ cm⁻³ to first group III nitride semiconductor layer 11.

By adding at least one element from among C, Mg, Fe, Be, Zn, V, and Sbas an impurity element by at least 1×10¹⁷ cm⁻³ in epitaxially growingfirst group III nitride semiconductor layer 11, high-resistivity firstgroup III nitride semiconductor layer 11 and first group III nitridesemiconductor substrates 11 a, 11 b, 11 c, and 11 d having theresistivity controlled to at least 1×10⁴ Ω·cm can be obtained. Inaddition, as the impurity element suppresses generation of dislocationand mitigates concentration of dislocation during growth of the firstgroup III nitride semiconductor layer, the group III nitridesemiconductor substrate having low dislocation density (for example, theaverage dislocation density is not higher than 1×10⁷ cm⁻², and surfacedensity of the dislocation-concentrated region where dislocation densityexceeds 1×10⁸ cm⁻² is not higher than 1 cm⁻²) can be obtained.

Here, the method of growing the group III nitride semiconductor layer isnot particularly limited, so long as the method is capable ofepitaxially growing the group III nitride semiconductor layer on theunderlying substrate. Various vapor deposition methods such as HVPE(hydride vapor phase epitaxy) method, MOCVD (metal-organic chemicalvapor deposition) method, and MBE (molecular beam epitaxy) method may beused. From a viewpoint of more efficiently obtaining a thick group IIInitride semiconductor substrate (for example, thickness of 70 μm orgreater), the HVPE method attaining higher growth rate is morepreferred.

The underlying substrate used in the method of manufacturing the groupIII nitride semiconductor substrate of the present embodiment is notparticularly limited, so long as the group III nitride semiconductorlayer can epitaxially be grown on the underlying substrate. Here, a GaAssubstrate, a sapphire substrate, an Si substrate, or an SiC substrate(particularly, a hexagonal system SiC substrate) is preferably employed.This is because mismatch of the crystal lattice between these substratesand the group III nitride semiconductor is less likely.

From a viewpoint of lower dislocation density of the group III nitridesemiconductor layer, the group III nitride substrate obtained in a facetgrowth method is more preferably employed as the underlying substrate.The reason why the dislocation density of the group III nitridesemiconductor layer is lowered will be described in detail below.

Here, characteristics of the method of manufacturing the group IIInitride semiconductor substrate using the facet growth method and groupIII nitride substrates 31 a, 31 b, 31 c, and 31 d obtained with thatmethod will be described with reference to FIG. 6. Initially, as shownin FIG. 6( a), a mask layer 2 having openings is formed on at least apart of underlying substrate 1, and a group III nitride semiconductorlayer 31 is epitaxially grown on underlying substrate 1 through theopenings of mask layer 2, as shown in FIG. 6( b). Here, a sapphiresubstrate, an Si substrate, an SiC substrate, or the like is used asunderlying substrate 1, and an SiO₂ layer or the like is used as themask layer. The HVPE method or the like is used as the method ofepitaxial growth.

Referring to FIG. 6( b), the facet growth method of the group IIInitride semiconductor layer is a method of forming a facet 31 f, whichis a surface other than a surface (average growth surface 31 h)perpendicular to an average growth direction of the group III nitridesemiconductor layer, and growing a group III nitride semiconductor layerwhile maintaining the facet. As a result of crystal growth on facet 31f, dislocation within the group III nitride semiconductor layer isconcentrated in a central portion of a pit 31 p formed by a plurality offacets 31 f, thus forming a dislocation-concentrated region 31 t. As thedislocations within the group III nitride semiconductor layer areconcentrated in dislocation-concentrated region 31 t, the dislocationdensity in a region (low dislocation region 31 u) other than thedislocation-concentrated region is significantly lowered.

Referring next to FIG. 6( c), epitaxially grown group III nitridesemiconductor layer 31 is cut to a prescribed thickness and its surfaceis polished, so as to manufacture group III nitride semiconductorsubstrates 31 a, 31 b, 31 c, and 31 d. Here, dislocation-concentratedregion 31 t and low dislocation region 31 u formed in group III nitridesemiconductor layer 31 remain also in group III nitride semiconductorsubstrates 31 a, 31 b, 31 c, and 31 d. In addition, due to thedifference in an amount of incorporation of the impurity element, in lowdislocation region 31 u as well; a region resulted from growth usingfacet 31 f as a growth surface (facet growth region) has become a regionhaving low resistivity (low resistivity region), while a region resultedfrom growth using average growth surface 31 h as a growth surface(average growth surface growth region) has become a region having highresistivity (high resistivity region), and therefore, the lowresistivity region and the high resistivity region have been present ina mixed manner. Therefore, it is difficult to control the resistivity ofthe group III nitride semiconductor substrate obtained with the facetgrowth method.

Therefore, in order to manufacture the group III nitride semiconductorsubstrate having controlled resistivity, the group III nitridesemiconductor is desirably grown, using as the growth surface, a uniformsurface where there is no difference in the amount of incorporation ofthe impurity element. In other words, in the growth step, the group IIInitride semiconductor layer is preferably grown while the average growthsurface of the group III nitride semiconductor layer maintains a flatuniform surface. In the present embodiment, it is considered that, byadding at least one element from among C, Mg, Fe, Be, Zn, V, and Sb asthe impurity element by at least 1×10¹⁷ cm⁻³ to the first group IIInitride semiconductor layer during epitaxial growth of the first groupIII semiconductor layer, the group III nitride semiconductor layer canbe grown while the average growth surface of the group III nitridesemiconductor layer maintains a flat uniform surface, and that loweringin the in-plane distribution of the resistivity in the main surface ofthe substrate, suppression of generation of the dislocation and/ormitigation of concentration of the dislocation are achieved duringepitaxial growth of the first group III nitride semiconductor layer.

Here, paying attention to the fact that the dislocation density of thegroup III nitride semiconductor substrate obtained with the facet growthmethod is lower in a portion except for dislocation-concentrated region31 t and the fact that generation of dislocation is suppressed andconcentration of the dislocation is mitigated during the growth of thegroup III nitride semiconductor layer by adding at least one elementfrom among C, Mg, Fe, Be, Zn, V, and Sb as the impurity element by atleast 1×10¹⁷ cm⁻³ in growing the group III nitride semiconductor layer,the present inventors have achieved manufacture of the group III nitridesemiconductor substrate having controlled high resistivity and lowdislocation density, by using the group III nitride semiconductorsubstrate obtained with the facet growth method as the underlyingsubstrate and by growing the group III nitride semiconductor layer whileadding at least one element from among C, Mg, Fe, Be, Zn, V, and Sb asthe impurity element by at least 1×10¹⁷ cm⁻³ to the group III nitridesemiconductor layer.

In other words, even when the group III nitride semiconductor layer isepitaxially grown on the group III nitride semiconductor substrateobtained in the facet growth method and employed as the underlyingsubstrate under the conventional general condition, the group IIInitride semiconductor layer takes over the dislocation in thedislocation-concentrated region in the group III nitride semiconductorsubstrate obtained in facet growth. Therefore, it has been difficult tolower the dislocation density of the group III nitride semiconductorlayer.

In contrast, by growing the group In nitride semiconductor layer on thegroup III nitride semiconductor substrate obtained with the facet growthmethod and employed as the underlying substrate while adding theimpurity element having a characteristic to suppress generation ofdislocation and to mitigate concentration of dislocation by at least1×10¹⁷ cm⁻³, the group III nitride semiconductor substrate havingcontrolled high resistivity and low dislocation density can bemanufactured.

If the underlying substrate used in the method of manufacturing thegroup III nitride semiconductor substrate of the present embodiment isimplemented by hexagonal system crystals, the main surface of theunderlying substrate is preferably at an angle in a range from at least−5° to at most 5° with respect to any one of a (0001) surface, a (1-100)surface and a (11-20) surface. If the main surface is implemented assuch, the group III nitride semiconductor layer and the group IIInitride semiconductor substrate attaining low dislocation density andexcellent crystallinity are more likely to be obtained.

In the method of manufacturing the group III nitride semiconductorsubstrate of the present embodiment, the material for the impurityelement is not particularly limited, however, from a viewpoint of easycrystal growth, at least one raw material from among methane (CH₄),magnesium chloride (MgCl₂ and the like), iron chloride (FeCl₂ and thelike), beryllium chloride (BeCl₂ and the like), zinc chloride (ZnCl₂ andthe like), vanadium chloride (VCl₂ and the like), and antimony chloride(SbCl and the like) is preferably employed. As to magnesium, iron,beryllium, zinc, vanadium, antimony, and the like, a metal of theseelements and a hydrochloric gas may be caused to react, so that theresultant gas is used as a raw material.

Embodiment 4

Referring to FIG. 2, in another method of manufacturing the group IIInitride semiconductor substrate according to the present invention,after mask layer 2 having openings is formed on at least a part ofunderlying substrate 1, the growth step (FIG. 2( a)) and the processstep (FIG. 2( b)) the same as in Embodiment 3 are performed. By growingfirst nitride semiconductor layer 11 on underlying substrate 1 throughthe openings of mask layer 2, what is called lateral growth is carriedout. Accordingly, the dislocation density of first group III nitridesemiconductor layer 11 can further be lowered. Here, an SiO₂ layer, anSi_(x)N_(y) layer or the like is used as the mask layer having openings,and it is formed with sputtering, thermal CVD, or the like.

Embodiment 5

Referring to FIG. 3, yet another method of manufacturing a group IIInitride semiconductor substrate according to the present inventionincludes: the growth step of epitaxially growing a second group IIInitride semiconductor layer 12 on first group III nitride semiconductorlayer 11 that has grown on underlying substrate 1 in Embodiment 3 or 4,as shown in FIG. 3( a); and the process step of forming second group IIInitride semiconductor substrates 12 a, 12 b, and 12 c by cutting and/orsurface-polishing second group III nitride semiconductor layer 12 asshown in FIG. 3( b). In the growth step, at least one element selectedfrom the group consisting of O, Si, S, Ge, Se, and Te is added as animpurity element by at least 1×10¹⁷ cm⁻³ to second group III nitridesemiconductor layer 12.

By adding at least one element from among O, Si, S, Ge, Se, and Te as animpurity element by at least 1×10¹⁷ cm⁻³ in epitaxially growing secondgroup III nitride semiconductor layer 12, low-resistivity second groupIII nitride semiconductor layer 12 and second group III nitridesemiconductor substrates 12 a, 12 b and 12 c having the resistivitycontrolled to at most 1 Ω·cm can be obtained. In addition, as secondgroup III nitride semiconductor layer 12 and second group III nitridesemiconductor substrates 12 a, 12 b and 12 c are epitaxially grown onfirst group III nitride semiconductor layer 11 attaining low dislocationdensity, the dislocation density thereof is low (for example, theaverage dislocation density can be not higher than 1×10⁷ cm⁻², andsurface density of the dislocation-concentrated region where dislocationdensity exceeds 1×10⁸ cm⁻² can be not higher than 1 cm⁻²).

The raw material for the impurity element is not particularly limited inthe method of manufacturing the group III nitride semiconductorsubstrate of the present embodiment, however, from a viewpoint of easycrystal growth, at least one raw material from among oxygen (O₂), water(H₂O), dichlorosilane (SiH₂Cl₄), tetrachlorosilane (SiCl₄), hydrogensulfide (H₂S), germanium chloride (GeCl₄), selenium chloride (SeCl₄),and tellurium chloride (TeCl₄) is preferably employed. As to germanium,selenium, tellurium, and the like, a metal of these elements and ahydrochloric gas may be caused to react, so that the resultant gas isused as a raw material.

Embodiment 6

Referring to FIG. 4, yet another method of manufacturing a group IIInitride semiconductor substrate according to the present inventionincludes: the growth step of epitaxially growing a third group IIInitride semiconductor layer 21 on a first or second group III nitridesemiconductor substrate 10 formed in the manufacturing method in any oneof Embodiments 3 to 5, as shown in FIG. 4( a); and the process step offorming third group III nitride semiconductor substrates 21 a, 21 b, 21c, and 21 d by cutting and/or surface-polishing third group III nitridesemiconductor layer 21 as shown in FIG. 4( b). In the growth step, atleast one element selected from the group consisting of C, Mg, Fe, Be,Zn, V, and Sb is added as an impurity element by at least 1×10¹⁷ cm⁻³ tothird group III nitride semiconductor layer 21.

By adding at least one element from among C, Mg, Fe, Be, Zn, V, and Sbas an impurity element by at least 1×10¹⁷ cm⁻³ in epitaxially growingthird group III nitride semiconductor layer 21, high-resistivity thirdgroup III nitride semiconductor layer 21 and third group III nitridesemiconductor substrates 21 a, 21 b, 21 c, and 21 d having theresistivity controlled to at least 1×10⁴ Ω·cm can be obtained. Inaddition, as third group III nitride semiconductor layer 21 and thirdgroup III nitride semiconductor substrates 21 a, 21 b, 21 c, and 21 dare epitaxially grown on first or second group III nitride semiconductorsubstrate 10 attaining low dislocation density and as the impurityelement having a characteristic to suppress generation of dislocationand to mitigate concentration of dislocation is added by at least 1×10¹⁷cm⁻³ , the dislocation density thereof is further lowered.

Embodiment 7

Referring to FIG. 5, yet another method of manufacturing a group IIInitride semiconductor substrate according to the present inventionincludes: the growth step of epitaxially growing a fourth group IIInitride semiconductor layer 22 on first or second group III nitridesemiconductor substrate 10 formed in the method of manufacturing thegroup III nitride semiconductor substrate in any one of Embodiments 3 to5 as shown in FIG. 5( a); and the process step of forming fourth groupIII nitride semiconductor substrates 22 a, 22 b, 22 c, and 22 d bycutting and/or surface-polishing fourth group III nitride semiconductorlayer 22 as shown in FIG. 5( b). In the growth step, at least oneelement selected from the group consisting of O, Si, S, Ge, Se, and Teis added as an impurity element by at least 1×10¹⁷ cm⁻³ to fourth groupIII nitride semiconductor layer 22.

By adding at least one element from among O, Si, S, Ge, Se, and Te as animpurity element by at least 1×10¹⁷ cm⁻³ in epitaxially growing fourthgroup III nitride semiconductor layer 22, low-resistivity fourth groupIII nitride semiconductor layer 22 and fourth group III nitridesemiconductor substrates 22 a, 22 b, 22 c, and 22 d having theresistivity controlled to at most 1 Ω·cm can be obtained. In addition,as fourth group III nitride semiconductor layer 22 and fourth group IIInitride semiconductor substrates 22 a, 22 b, 22 c, and 22 d areepitaxially grown on first or second group III nitride semiconductorsubstrate 10 attaining low dislocation density, the dislocation densitythereof is low.

Example 1

Referring to FIG. 1( a), the GaN substrate (the main surface of thesubstrate is at an angle of 1° in a direction of {1-100} surface withrespect to (0001) surface) grown with the facet growth method (themethod described in Patent Document 1) in the HVPE method was used asunderlying substrate 1, and the high-resistivity GaN layer was grown asfirst group III nitride semiconductor layer 11 to a thickness of 2000μm, using the HVPE method. A GaCl gas obtained by bringing an HCl gas incontact to gallium metal at 800° C. was used as the Ga source, and anNH₃ gas was used as the N source. In addition, a methane gas was used asthe impurity element raw material for adding C representing the impurityelement. Moreover, an H₂ gas was used as the carrier gas.

Here, the condition for epitaxial growth of the GaN layer using the HVPEmethod was set as follows: growth temperature (temperature of theunderlying substrate) of 1050° C.; total pressure of 100 kPa (1.0atmospheric pressure); partial pressure of NH₃ of 20 kPa (0.2atmospheric pressure); partial pressure of GaCl of 0.5 kPa (5×10⁻³atmospheric pressure); partial pressure of the impurity element rawmaterial in a range from 0.0001 kPa (1×10⁻⁶ atmospheric pressure) to 1.0kPa (1×10⁻² atmospheric pressure); and the growth time period of 10hours.

Referring next to FIG. 1( b), the obtained GaN layer was cut in parallelto the main surface of the substrate, and the surface thereof waspolished, thus obtaining the high-resistivity GaN substrate having athickness of 300 μm.

The content of impurity element C in the obtained GaN substrate wasmeasured using SIMS (secondary ion mass spectrometry). The minimumconcentration of C was 10¹⁸ cm⁻³, and the in-plane distribution of theconcentration of C (maximum concentration/minimum concentration) was1.5. When the resistivity of the GaN substrate was measured, theresistivity was controlled to at least 1×10⁷ Ω·cm. When the averagedislocation density of the GaN substrate was measured with TEM(transmission electron microscope), the average dislocation density was1×10⁶ cm⁻². When the surface density of the dislocation-concentratedregion (the region where dislocation density exceeds 1×10⁸ cm⁻²; to beunderstood similarly hereinafter) in the GaN substrate was measuredusing CL (cathode luminescence), the surface density was not higher than1 cm⁻². The half-width of the rocking curve in X-ray diffraction of theGaN substrate was 60 arcsec. When the carrier density of the GaNsubstrate was evaluated using C (charge)-V (voltage) measurement, thecarrier density was not higher than 1×10¹⁵ cm⁻³, and measurement thereofwas impossible. When the absorption coefficient for light of awavelength of 450 mn of the GaN substrate was measured with aspectrophotometer, the absorption coefficient for light was not smallerthan 50 cm⁻¹. Table 1 summarizes the result.

Example 2

The high-resistivity GaN substrate was obtained in a manner the same asin Example 1, except for using magnesium chloride (MgCl₂) as theimpurity element raw material. The minimum concentration of impurityelement Mg in the obtained GaN substrate was 1×10¹⁸ cm⁻³, the in-planedistribution of the concentration of Mg (maximum concentration/minimumconcentration) was 2.5, the resistivity was not lower than 1×10⁵ Ω·cm,the average dislocation density was 1×10⁶ cm⁻², the surface density ofthe dislocation-concentrated region was not higher than 1 cm⁻², thehalf-width of the rocking curve in X-ray diffraction was 80 arcsec, thecarrier density was not higher than 1×10¹⁵ cm⁻³, and the absorptioncoefficient for light of a wavelength of 450 nm was not smaller than 50cm⁻¹. Table 1 summarizes the result.

Example 3

The high-resistivity GaN substrate was obtained in a manner the same asin Example 1, except for using an iron chloride (FeCl₂) gas generated asa result of reaction of iron and hydrochloric gas as the impurityelement raw material. The minimum concentration of impurity element Fein the obtained GaN substrate was 1×10¹⁸ cm⁻³, the in-plane distributionof the concentration of Fe (maximum concentration/minimum concentration)was 2.0, the resistivity was not lower than 1×10¹⁷ Ω·cm, the averagedislocation density was 1×10⁶ cm⁻², the surface density of thedislocation-concentrated region was not higher than 1 cm⁻², thehalf-width of the rocking curve in X-ray diffraction was 80 arcsec, thecarrier density was not higher than 1×10¹⁵ cm⁻³, and the absorptioncoefficient for light of a wavelength of 450 nm was not smaller than 50cm⁻¹. Table 1 summarizes the result.

Example 4

Referring to FIG. 2( a), the GaN substrate (the main surface of thesubstrate is at an angle of 1° in a direction of {1100} surface withrespect to (0001) surface) grown with the facet growth method (themethod described in Patent Document 1) in the HVPE method was used asunderlying substrate 1. The high-resistivity GaN substrate was obtainedin a manner the same as in Example 1 after the SiO₂ layer having athickness of 0.1 μm, in which openings each having a size of 2 μm×2 μmwere uniformly distributed in a shape like a close-packed structure, wasformed as mask layer 2 having openings, on at least a part of the GaNsubstrate serving as underlying substrate 1. Here, mask layer 2 wasobtained by forming the SiO₂ layer to a thickness of 0.1 μm usingsputtering, and thereafter forming openings each having a size of 2 μm×2μm with photolithography such that they are uniformly distributed in ashape like a close-packed structure. The minimum concentration ofimpurity element C in the obtained GaN substrate was 1×10¹⁸ cm⁻³, thein-plane distribution of the concentration of C (maximumconcentration/minimum concentration) was 1.5, the resistivity was notlower than 1×10⁷ Ω·cm, the average dislocation density was 1×10⁵ cm⁻²,the surface density of the dislocation-concentrated region was nothigher than 1 cm⁻², the half-width of the rocking curve in X-raydiffraction was 50 arcsec, the carrier density was not higher than1×10¹⁵ cm⁻³, and the absorption coefficient for light of a wavelength of450 nm was not smaller than 50 cm⁻¹. Table 1 summarizes the result.

Example 5

The high-resistivity GaN substrate was obtained in a manner the same asin Example 4, except for employing a sapphire substrate (the mainsurface of the substrate is at an angle of 1° in a direction of {1100}surface with respect to (0001) surface) as underlying substrate 1. Theminimum concentration of impurity element C in the obtained GaNsubstrate was 1×10¹⁸ cm⁻³, the in-plane distribution of theconcentration of C (maximum concentration/minimum concentration) was1.5, the resistivity was not lower than 1×10⁷ Ω·cm, the averagedislocation density was 1×10⁷ cm⁻², the surface density of thedislocation-concentrated region was not higher than 1 cm⁻², thehalf-width of the rocking curve in X-ray diffraction was 100 arcsec, thecarrier density was not higher than 1×10¹⁵ cm⁻³, and the absorptioncoefficient for light of a wavelength of 450 nm was not smaller than 50cm⁻¹. Table 1 summarizes the result.

Example 6

The high-resistivity GaN substrate was obtained in a manner the same asin Example 4, except for employing a GaAs substrate (the main surface ofthe substrate is at an angle of 1° in a direction of {011} surface withrespect to (111) Ga surface) as underlying substrate 1. The minimumconcentration of impurity element C in the obtained GaN substrate was1×10¹⁸ cm⁻³, the in-plane distribution of the concentration of C(maximum concentration/minimum concentration) was 1.5, the resistivitywas not lower than 1×10⁷ Ω·cm, the average dislocation density was 2×10⁷cm⁻², the surface density of the dislocation-concentrated region was nothigher than 1 cm⁻², the half-width of the rocking curve in X-raydiffraction was 110 arcsec, the carrier density was not higher than1×10¹⁵ cm⁻³, and the absorption coefficient for light of a wavelength of450 nm was not smaller than 50 cm⁻¹. Table 1 summarizes the result.

Example 7

The high-resistivity GaN substrate was obtained in a manner the same asin Example 4, except for employing a 6H-SiC substrate (the main surfaceof the substrate is at an angle of 1° in a direction of {1-100} surfacewith respect to (0001) surface) as underlying substrate 1. The minimumconcentration of impurity element C in the obtained GaN substrate was1×10¹⁸ cm⁻³, the in-plane distribution of the concentration of C(maximum concentration/minimum concentration) was 1.5, the resistivitywas not lower than 1×10⁷ Ω·cm, the average dislocation density was 4×10⁷cm⁻², the surface density of the dislocation-concentrated region was nothigher than 1 cm⁻², the half-width of the rocking curve in X-raydiffraction was 130 arcsec, the carrier density was not higher than1×10¹⁵ cm⁻³, and the absorption coefficient for light of a wavelength of450 nm was not smaller than 50 cm⁻¹. Table 1 summarizes the result.

Comparative Example 1

In the GaN substrate grown with the facet growth method (the methoddescribed in Patent Document 1) in the HVPE method and used asunderlying substrate 1 in Example 1 (the main surface of the substrateis at an angle of 1° in a direction of {1-100} surface with respect to(0001) surface), the minimum concentration of the impurity element was1×10¹⁶ cm⁻³, the in-plane distribution of the concentration of theimpurity element (maximum concentration/minimum concentration) was 30,the resistivity was 0.01 Ω·cm, the average dislocation density was 1×10⁶cm⁻², the surface density of the dislocation-concentrated region was 500cm⁻², the half-width of the rocking curve in X-ray diffraction was 60arcsec, the carrier density was not higher than 1×10¹⁸ cm⁻³, and theabsorption coefficient for light of a wavelength of 450 nm was notlarger than 30 cm⁻¹. Table 1 summarizes the result.

TABLE 1 Example 1 Example 2 Example 3 Example 4 Underlying CompositionGaN GaN GaN GaN substrate Angle of main surface 1° in 1° in 1° in 1° indirection of direction of direction of direction of {1-100} {1-100}{1-100} {1100} from (0001) from (0001) from (0001) from (0001) surfacesurface surface surface Presence/absence of mask layer absent absentabsent present Doping material CH₄ MgCl₂ FeCl₂ CH₄ Group III ImpurityType C Mg Fe C nitride element Minimum concentration 1 × 10¹⁸ 1 × 10¹⁸ 1× 10¹⁸ 1 × 10¹⁸ semiconductor (cm⁻³) substrate In-plane distribution  1.5   2.5   2.0   1.5 (maximum concentration/ minimum concentration)Resistivity (Ω · cm) 1 × 10⁷ or 1 × 10⁵ or 1 × 10⁷ or 1 × 10⁷ or higherhigher higher higher Average dislocation density (cm⁻²) 1 × 10⁶  1 ×10⁶  1 × 10⁶  1 × 10⁵  Surface density of 1 or 1 or 1 or 1 ordislocation-concentrated region (cm⁻²) lower lower lower lowerHalf-width of rocking curve (arcsec) 60 80 80 50 Carrier density (cm⁻³)1 × 10¹⁵ or 1 × 10¹⁵ or 1 × 10¹⁵ or 1 × 10¹⁵ or lower lower lower lowerAbsorption coefficient for light (cm⁻¹) 50 or 50 or 50 or 50 or largerlarger larger larger Comparative Example 5 Example 6 Example 7 Example 1Underlying Composition sapphire GaAs 6H—SiC substrate Angle of mainsurface 1° in 1° in 1° in direction of direction of direction of {1100}{011} from {1-100} from (0001) (111) Ga from (0001) surface surfacesurface Presence/absence of mask layer present present present Dopingmaterial CH₄ CH₄ CH₄ Group III Impurity Type C C C various nitrideelement Minimum concentration 1 × 10¹⁸ 1 × 10¹⁸ 1 × 10¹⁸ 1 × 10¹⁶semiconductor (cm⁻³) substrate In-plane distribution   1.5   1.5   1.530 (maximum concentration/ minimum concentration) Resistivity (Ω · cm) 1× 10⁷ or 1 × 10⁷ or 1 × 10⁷ or   0.01 higher higher higher Averagedislocation density (cm⁻²) 1 × 10⁷  2 × 10⁷  4 × 10⁷  1 × 10⁶  Surfacedensity of 1 or 1 or 1 or 500  dislocation-concentrated region (cm⁻²)lower lower lower Half-width of rocking curve (arcsec) 100 110 130 60Carrier density (cm⁻³) 1 × 10¹⁵ or 1 × 10¹⁵ or 1 × 10¹⁵ or 1 × 10¹⁸lower lower lower Absorption coefficient for light (cm⁻¹) 50 or 50 or 50or 30 or larger larger larger smaller

As can clearly be seen from Table 1, by adding at least one element fromamong C, Mg, Fe, Be, Zn, V, and Sb as the impurity element by at least1×10¹⁷ cm⁻³ to the group III nitride semiconductor layer in epitaxiallygrowing the group III nitride semiconductor layer on the underlyingsubstrate, the GaN substrate attaining the resistivity controlled to atleast 1×10⁴ Ω·cm (preferably, 1×10⁷ Ω·cm), the average dislocationdensity not higher than 1×10⁷ cm⁻², the surface density of thedislocation-concentrated region where dislocation density exceeds 1×10⁸cm⁻² of at most 1 cm⁻², the half-width of the rocking curve in X-raydiffraction in a range from at least 10 arcsec to at most 500 arcsec,and the carrier density not higher than 1×10¹⁵ cm⁻³ was obtained.

Example 8

The low-resistivity GaN substrate was obtained in a manner the same asin Example 1, except for employing the high-resistivity GaN substrate(the main surface of the substrate matches with (0001) surface (angle of0°))manufactured in Example 1 as underlying substrate 1, employing anoxygen (O₂) gas as the impurity element raw material, and setting thepartial pressure of the impurity element raw material to 0.001 kPa(1×10⁻⁵ atmospheric pressure).

The minimum concentration of impurity element O in the obtained GaNsubstrate was 1×10¹⁸ cm⁻³, the in-plane distribution of theconcentration of O (maximum concentration/minimum concentration) was1.5, the resistivity was 0.010 Ω·cm, the average dislocation density was1×10⁶ cm⁻², the surface density of the dislocation-concentrated regionwas not higher than 1 cm⁻², the half-width of the rocking curve in X-raydiffraction was 60 arcsec, the carrier density was 1×10¹⁸ cm⁻³, and theabsorption coefficient for light of a wavelength of 450 nm was notlarger than 5 cm⁻¹. Table 2 summarizes the result.

Example 9

The low-resistivity GaN substrate was obtained in a manner the same asin Example 8, except for employing a tetrachlorosilane (SiCl₄) gas asthe impurity element raw material. The minimum concentration of impurityelement Si in the obtained GaN substrate was 1×10¹⁸ cm⁻³, the in-planedistribution of the concentration of Si (maximum concentration/minimumconcentration) was 2.5, the resistivity was 0.01 Ω·cm, the averagedislocation density was 1×10⁶ cm⁻², the surface density of thedislocation-concentrated region was not higher than 1 cm⁻², thehalf-width of the rocking curve in X-ray diffraction was 60 arcsec, thecarrier density was 1×10¹⁸ cm⁻³, and the absorption coefficient forlight of a wavelength of 450 nm was not larger than 5 cm⁻¹. Table 2summarizes the result.

Example 10

The low-resistivity GaN substrate was obtained in a manner the same asin Example 8, except for employing a hydrogen sulfide (H₂S) gas as theimpurity element raw material. The minimum concentration of impurityelement S in the obtained GaN substrate was 1×10¹⁸ cm⁻³, the in-planedistribution of the concentration of S (maximum concentration/minimumconcentration) was 2.0, the resistivity was 0.02 Ω·cm, the averagedislocation density was 1×10⁷ cm⁻², the surface density of thedislocation-concentrated region was not higher than 1 cm⁻², thehalf-width of the rocking curve in X-ray diffraction was 60 arcsec, thecarrier density was 7×10¹⁷ cm⁻³, and the absorption coefficient forlight of a wavelength of 450 nm was not larger than 10 cm⁻¹. Table 2summarizes the result.

TABLE 2 Example 8 Example 9 Example 10 Underlying Composition GaN GaNGaN substrate Angle of main surface 0° from 0° from 0° from (0001)(0001) (0001) surface surface surface Presence/absence of mask layerabsent absent absent Doping material O₂ SiCl₄ H₂S Group III ImpurityType O Si S nitride element Minimum concentration 1 × 10¹⁸ 1 × 10¹⁸ 1 ×10¹⁸ semiconductor (cm⁻³) substrate In-plane distribution 1.5 2.5 2.0(maximum concentration/ minimum concentration) Resistivity (Ω · cm) 0.01  0.01  0.02 Average dislocation density (cm⁻²) 1 × 10⁶ 1 × 10⁶ 1 ×10⁷ Surface density of 1 or 1 or 1 or dislocation-concentrated region(cm⁻²) lower lower lower Half-width of rocking curve (arcsec) 60   60  60   Carrier density (cm⁻³) 1 × 10¹⁸ 1 × 10¹⁸ 1 × 10¹⁷ Absorptioncoefficient for light (cm⁻¹) 5 or 5 or 10 or smaller smaller smaller

As can clearly be seen from Table 2, by adding at least one element fromamong O, Si, S, Ge, Se, and Te as the impurity element by at least1×10¹⁷ cm⁻³ to the group III nitride semiconductor layer in epitaxiallygrowing the group III nitride semiconductor layer on the underlyingsubstrate, the GaN substrate attaining the resistivity controlled to atmost 1 Ω·cm, the average dislocation density not higher than 1×10⁷ cm⁻²,the surface density of the dislocation-concentrated region wheredislocation density exceeds 1×10⁸ cm⁻² of at most 1 cm⁻², the half-widthof the rocking curve in X-ray diffraction in a range from at least 10arcsec to at most 500 arcsec, and the carrier density in a range from atleast 1×10¹⁷ cm⁻³ to at most 1×10²⁰ cm⁻³ was obtained.

Although the present invention has been described and illustrated indetail, it is clearly understood that the same is by way of illustrationand example only and is not to be taken by way of limitation, the spiritand scope of the present invention being limited only by the terms ofthe appended claims.

1. A group III nitride semiconductor substrate containing at least oneelement selected from the group consisting of C, Mg, Fe, Be, Zn, V, andSb as an impurity element in concentration of at least 1×10¹⁷ cm⁻³;wherein in-plane distribution of the concentration of said impurityelement represented as a ratio of a maximum concentration to a minimumconcentration of said impurity element in a main surface of thesubstrate is in a range from at least 1 to at most 3, and said group IIInitride semiconductor substrate has resistivity of at least 1×10⁴ Ω·cmand thickness of at least 70 μm.
 2. The group III nitride semiconductorsubstrate according to claim 1, wherein average dislocation density isat most 1×10⁷ cm⁻², and surface density of a dislocation-concentratedregion where dislocation density exceeds 1×10⁸ cm⁻² is at most 1 cm⁻².3. The group III nitride semiconductor substrate according to claim 1,wherein said group III nitride is GaN.
 4. The group III nitridesemiconductor substrate according to claim 1, wherein said main surfaceof said group III nitride semiconductor substrate is at an angle in arange from at least −5° to at most 5° with respect to any one of a(0001) surface, a (1-100) surface and a (11-20) surface.
 5. The groupIII nitride semiconductor substrate according to claim 1, wherein ahalf-width of a rocking curve in X-ray diffraction is in a range from atleast 10 arcsec to at most 500 arcsec.
 6. The group III nitridesemiconductor substrate according to claim 1, wherein carrier density isat most 1×10¹⁵ cm⁻³.
 7. The group III nitride semiconductor substrateaccording to claim 1, wherein absorption coefficient for light having awavelength of 450 nm is at least 50 cm⁻¹.
 8. A group III nitridesemiconductor substrate containing at least one element selected fromthe group consisting of O, Si, S, Ge, Se, and Te as an impurity elementin concentration of at least 1×10¹⁷ cm⁻³; wherein in-plane distributionof the concentration of said impurity element represented as a ratio ofa maximum concentration to a minimum concentration of said impurityelement in a main surface of the substrate is in a range from at least 1to at most 3, and said group III nitride semiconductor substrate hasresistivity of at most 1 Ω·cm and thickness of at least 70 μm.
 9. Thegroup III nitride semiconductor substrate according to claim 8, whereinaverage dislocation density is at most 1×10⁷ cm⁻², and surface densityof a dislocation-concentrated region where dislocation density exceeds1×10⁸ cm⁻² is at most 1 cm⁻².
 10. The group III nitride semiconductorsubstrate according to claim 8, wherein said group III nitride is GaN.11. The group III nitride semiconductor substrate according to claim 8,wherein said main surface of said group III nitride semiconductorsubstrate is at an angle in a range from at least −5° to at most 5° withrespect to any one of a (0001) surface, a (1-100) surface and a (11-20)surface.
 12. The group III nitride semiconductor substrate according toclaim 8, wherein a half-width of a rocking curve in X-ray diffraction isin a range from at least 10 arcsec to at most 500 arcsec.
 13. The groupIII nitride semiconductor substrate according to claim 8, whereincarrier density is in a range from at least 1×10¹⁷ cm⁻³ to at most1×10²⁰ cm⁻³.
 14. The group III nitride semiconductor substrate accordingto claim 8, wherein absorption coefficient for light of a wavelength of450 nm is at most 10 cm⁻¹. 15-30. (canceled)